1) Field of the Invention
The present invention relates to a read only memory (ROM). In particular, it relates to a ROM in which a portion of an address area is allotted to another memory or other memories.
2) Description of the Related Art
In a conventional system, when a portion of a series address area allotted to a ROM (as a whole) is allotted another memory as addresses thereof instead of being allotted to the ROM, an external addition of an address decoding circuit is necessary. The smaller the area occupied by the memory to be allotted, the relatively larger the scale of the address decoding circuit, and this scale expansion causes a corresponding increase in the power consumption of the system. This is because, if the occupied address area of the memory to be allotted is small in comparison with the ROM capacity, a circuit comprising many logical elements becomes necessary for address selection. This invention proposes to solve the above problem.